Decade counter driving a seven-segment display
A clock ticks, a counter counts, a decoder works out which bars to light, and a display shows a digit. Four parts on the board and 244 NAND gates behind them, which is roughly the point: showing a single decimal digit is not a small thing when you build it from the bottom.
Out of the box it counts at 1 Hz — one digit a second. The clock knob is the rate, in hertz: right is faster, left is slower, a decade either side of the 1 Hz mid-point. The speed knob next to it is a plain fast-forward, ×1 to ×20, and it multiplies whatever the clock is set to — leave it at ×1 to watch, push it right when you just want the board to arrive somewhere.
The four stages
CLOCK is a square wave. Its rate comes from the clock knob in the
toolbar, and every clock instance anywhere in the project ticks in phase with
it — one clock domain, as in real synchronous hardware.
COUNT-10 holds the count in a four-bit register, adds one with an
incrementer, and detects the value nine to mask the next value back to zero.
That detector is the only reason it counts in decimal rather than to fifteen
and wrapping.
SEG-DEC is a lookup table made of gates: four bits in, seven segment
lines out. It uses two DECODE-2 blocks to turn the nibble into one-hot
minterms, then ORs together the minterms that light each bar. Digit 5 lights
a, c, d, f and g; digit 1 lights only b and c.
7-SEG is a primitive — real display hardware, with one input per bar
plus a dot. It has no JSON definition and nothing inside it.
Things worth trying
- Pause and single-step.
sadvances one frame; the readout beside the clock slider counts down the frames to the next edge.Sjumps straight to that edge, which is the only sane way to reach one at the default divider of 200. Step across an edge one frame at a time and you can watch the carry ripple — the count passes through a wrong value for a few frames before it settles, which is why the running display steps over that window rather than painting it. - Open
COUNT-10, thenREG-4, then aD-FLOP, then aD-LATCH: four levels down you are looking at cross-coupled NANDs holding one bit.
Built out of NAND gates and nothing else. The sandbox, the JSON module format and the rest of the library are described in Digital logic — from NAND to a computer.